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在人工智能需求高涨之际,Marvell 早期的芯片制造押注终于获得回报

八年前,芯片制造商美满电子科技公司决定在纳米制程领域实现跨越式发展,此后其发展轨迹一路向上。在半导体制造领域,纳米制程代号用于标识不同代际的芯片制造技术,即所谓的工艺节点,而非指晶体管的确切物理尺寸。先进的工艺节点通常能够提升晶体管密度,并带来性能上的改进……文章《美满电子在人工智能需求推动下,早期的芯片制造豪赌终获回报》首发于SiliconANGLE。

对应语言译文排队中,完成后自动更新。

UPDATED 11:58 EDT / OCTOBER 26 2026

Marvell’s early chipmaking gamble pays off amid AI demand

by Mark Albertson

Eight years ago, chipmaker Marvell Technology Inc. decided to play leapfrog with nanometers, and its trajectory has been steadily upward since.

In semiconductor manufacturing, nanometer designations identify generations of chipmaking technology, known as process nodes, rather than the exact physical dimensions of transistors. Advanced process nodes generally enable greater transistor density and improvements in performance and power efficiency.

Chipmakers have usually followed a set progression downward in nanometer sizes, and skipping a level constituted a significant risk. Marvell decided to make that bet.

“Back around 2018, 2019 ,we made a decision that if we wanted to do data infrastructure, we needed to be a leader and not a follower, and that meant jumping to the latest process node with the best technology,” said Will Chu (pictured, left), executive vice president and general manager of the Custom Cloud Solutions Business Unit, at Marvell. “So, we skipped 7 nanometer. We had products like 12 and 16 nanometer and the next logical one would have been 7. We jumped all the way to 5…we kept going – 3 nanometer, 2 nanometer, 14 angstrom. We’ve been running that playbook, and it’s really served as the foundation for our growth to be a leader in the cloud.”

Chu spoke with theCUBE’s John Furrier for theCUBE + NYSE Wired: AI Factories – Data Centers of the Future interview series, during an exclusive broadcast on theCUBE, SiliconANGLE Media’s livestreaming studio. He was joined by David Lazovsky (right), executive vice president and general manager of the Data Center Networking Business Group at Marvell, and they discussed how the company has built its business around improving efficiency for enterprise AI architectures. (* Disclosure below.)

Optical solutions for AI architectures

A cornerstone of Marvell’s platform is serializer/deserializer (SerDes) technology, which provides high-speed, multi-gigabit data transmission for AI clusters, cloud data centers, and enterprise networking. Scaling AI infrastructure is a critical challenge in today’s data centers, and Marvell has been using SerDes to improve power efficiency.

In September, the company unveiled 2-nanometer optical interconnect technologies designed to support AI scale-up architectures, which tightly connect multiple computing and memory resources to operate as a larger system.

“Why interconnectivity with scale-up moving from copper to optics is so important is because processor-to-processor data transmission, roughly 85% of total data transmission, is happening inside of these scale-up networks, and only 15% across the scale-out network,” Lazovsky told theCUBE. “If you can positively impact the energy efficiency, you can move the needle significantly. We’re developing technologies that leverage optics and SerDes … that significantly reduce the total power consumption.”

Marvell’s focus on efficient architecture has also led to advances in high-bandwidth memory. In August, the company announced a Photonic Fabric Memory Module designed to enable a shared-memory tier across AI infrastructure. The technology combines DDR5 memory, high-bandwidth memory caching and optical connectivity to allow memory resources to be shared across AI systems.

“For the first time ever, Marvell has developed optically interconnected high capacity, high bandwidth memory,” Lazovsky said. “There are two stacks of high bandwidth memory, and this supports a module with up to eight stacks of Double Data Rate 5. It provides you the ability to decouple memory capacity from compute for the first time.”

Marvell’s advances in memory and optical networking have strengthened its position in the AI infrastructure market. Nvidia Corp. announced a $2 billion investment in the firm earlier this year, and Marvell recently announced an agreement that it would design custom AI chips for Google LLC.

“This is the biggest buildout in CapEx in human history,” Chu said. “In terms of our connectivity business, our networking business, and our custom business, we’re attached to the fastest growing part of those markets. We have the leading technology, we have the customer credibility, a track record of execution.”

Here’s the complete video interview, part of SiliconANGLE’s and theCUBE’s coverage of theCUBE + NYSE Wired: AI Factories – Data Centers of the Future interview series:

(* Disclosure: TheCUBE is a paid media partner for theCUBE + NYSE Wired: AI Factories – Data Centers of the Future interview series. Neither Marvell, the sponsor of theCUBE’s event coverage, nor other sponsors have editorial control over content on theCUBE or SiliconANGLE.)

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